A modular computational engine for communications processing

Embedded computational hardware has become prevalent in recent years for communications signal processing for reasons including size and cost. The availability of competing processor architectures from vendors allows a high degree of choice for communications system designers, and some traditional processor vendors have targeted this market aggressively. However whilst one particular computational device may well suit a given application, it seldom suits a broad range of other applications. From a design perspective, this is inefficient: either system developers familiar with one processor from a project choose to use it for the next project despite some likely degree of mismatch, or they are faced with a costly learning curve implied in the adoption of a different, but better matched, architecture. A preferable approach is to allow computational hardware to be adapted at a microarchitecture level to fit requirements on a project-to-project basis whilst maintaining common instructions and development tools. The paper proposes the 2k2 architecture, a flexible and modular computational system that allows communications system developers to standardise on one architecture, software model and toolchain for many projects. Despite maintaining a single architecture, the 2k2 allows designers to tailor the processor core to the requirements of each individual project.